Archives


Rate this Article: (0) Votes

Research Article

Year : 2018 | Volume: 4 | Issue: 1 | Pages: 9-15

FPGA Based Signal Emulator for Radar Signal Processing

J Pandu1*, R Murali Prasad2

http://dx.doi.org/doi:10.18831/djece.org/12018011002

Corresponding author

J Pandu*

Professor, Dept. of ECE, Vardhaman College of Engineering, Hyderabad, India.

  • 1. Professor, Dept. of ECE, Vardhaman College of Engineering, Hyderabad, India.

Received on: 2017/08/08

Revised on: 2017/11/27

Accepted on: 2017/12/18

Published on: 2017/12/23

  • FPGA Based Signal Emulator for Radar Signal Processing, J Pandu, R Murali Prasad 2017/12/23, DJ Journal of Advances in Electronics and Communication Engineering, 4(1), 9-15, http://dx.doi.org/10.18831/djece.org/12018011002.

    Published on: 2017/12/23

Abstract

This paper presents the design of signal simulator for advanced modern radar technology through field programmable gate array implementation. When considering all other possibilities, implementation of FPGA shows an impressive result in efficiency. By generating the complex waveform, chirp signal is sent to the destination by means of wide band spread spectrum. This approach is developed for an effective receiver end through filtering by using noise shaping, digital signal synthesizer and pulse accumulator. This system supports effective signal interference and jamming, and overcomes the inconvenience occur in its application.

Keywords

Radar technology, Field programmable gate array, Wide band spectrum, Signal interference, Filter.